A 16-bit memory of total capacity 8192 bits using SRAM chips of size 64 X 1 bit. Give the array configuration of the chips on the memory board showing all required input and output signals for assigning this memory to the lowest address space. The design should allow for both byte and 16-bit word accesses. What is the number of total addressable location of 16 bits?
Select one:
a. 600
b. 32
c. 512
d. 8192
